Chipset Configuration Registers
10.1.18 ULBA—Upstream Link Base Address Register
Offset Address: 0118–011Fh
Attribute:
Size:
R/WO
64-bit
Default Value:
0000000000000000h
Bit
Description
Base Address Upper (BAU) — R/WO. This field is programmed by platform BIOS to
match the upper 32-bits of base address of the (G)MCH RCRB that is attached to this
RCRB.
63:32
31:0
Base Address Lower (BAL) — R/WO. This field is programmed by platform BIOS to
match the lower 32-bits of base address of the (G)MCH RCRB that is attached to this
RCRB.
10.1.19 RP1D—Root Port 1 Descriptor Register
Offset Address: 0120–0123h
Attribute:
Size:
R/WO, RO
32-bit
Default Value:
01xx0002h
Bit
Description
Target Port Number (PN) — RO. Indicates the target port number is 1h (root port
#1).
31:24
23:16
Target Component ID (TCID) — R/WO. This field returns the value of the ESD.CID
(offset 0104h, bits 23:16) field programmed by platform BIOS, since the root port is
in the same component as the RCRB.
15:2
1
Reserved
Link Type (LT) — RO. Indicates that the link points to a root port.
Link Valid (LV) — RO. When FD.PE1D (offset 3418h, bit 16) is set, this link is not
valid (returns 0). When FD.PE1D is cleared, this link is valid (returns 1).
0
10.1.20 RP1BA—Root Port 1 Base Address Register
Offset Address: 0128–012Fh
Attribute:
Size:
RO
64-bit
Default Value:
00000000000E0000h
Bit
Description
63:28
27:20
19:15
14:12
11:0
Reserved
Bus Number (BN) — RO. Indicates the root port captured bus number.
Device Number (DN) — RO. Indicates the root port is on device #28.
Function Number (FN) — RO. Indicates the root port is on function #0.
Reserved
Datasheet
313
INTEL [ INTEL ]
