Functional Description
Table 5-53. Command Types (Sheet 2 of 2)
Command
Type
Description
SMLINK_SLV_SMI. When ICH10 detects this command type while in the S0
state, it sets the SMLINK_SLV_SMI_STS bit (see Section 13.9.5). This command
should only be used if the system is in an S0 state. If the message is received
during S1–S5 states, the ICH10 acknowledges it, but the SMLINK_SLV_SMI_STS
bit does not get set.
NOTE: It is possible that the system transitions out of the S0 state at the same
time that the SMLINK_SLV_SMI command is received. In this case, the
SMLINK_SLV_SMI_STS bit may get set but not serviced before the system
goes to sleep. Once the system returns to S0, the SMI associated with this
bit would then be generated. Software must be able to handle this scenario.
8
9-FFh
Reserved.
5.20.7.2
Format of Read Command
The external master performs Byte Read commands to the ICH10 SMBus Slave
interface. The “Command” field (bits 18:11) indicate which register is being accessed.
The Data field (bits 30:37) contain the value that should be read from that register.
Table 5-54. Slave Read Cycle Format
Bit
Description
Driven by
Comment
1
Start
External Microcontroller
Must match value in Receive Slave
Address register
2-8
Slave Address - 7 bits
External Microcontroller
9
Write
ACK
External Microcontroller
Intel ICH10
Always 0
10
Indicates which register is being
accessed. See Table 5-55 below
for list of implemented registers.
11-18 Command code – 8 bits External Microcontroller
19
20
ACK
Intel ICH10
Repeated Start
External Microcontroller
Must match value in Receive Slave
Address register
21-27 Slave Address - 7 bits
External Microcontroller
28
29
Read
ACK
External Microcontroller
Intel ICH10
Always 1
Value depends on register being
accessed. Table 5-55 below for list
of implemented registers.
30-37 Data Byte
Intel ICH10
38
39
NOT ACK
Stop
External Microcontroller
External Microcontroller
224
Datasheet
INTEL [ INTEL ]
