Functional Description
5.13.6.3
Exiting Sleep States
Sleep states (S1–S5) are exited based on Wake events. The Wake events forces the
system to a full on state (S0), although some non-critical subsystems might still be
shut off and have to be brought back manually. For example, the hard disk may be shut
off during a sleep state, and have to be enabled via a GPIO pin before it can be used.
Upon exit from the ICH10-controlled Sleep states, the WAK_STS bit is set. The possible
causes of Wake Events (and their restrictions) are shown in Table 5-31.
Table 5-31. Causes of Wake Events
States Can
Wake From
Cause
How Enabled
S1–S5
(Note 1)
RTC Alarm
Set RTC_EN bit in PM1_EN register
Power Button
S1–S5
Always enabled as Wake event. (Note 2).
GPE0_EN register
S1–S5
(Note 1)
NOTE: GPIs that are in the core well are not capable of
waking the system from sleep states when the core
well is not powered.
GPI[0:15]
Set USB1_EN, USB 2_EN, USB3_EN, USB4_EN, USB5_EN,
and USB6_EN bits in GPE0_EN register
Classic USB
LAN
S1–S4
S1–S5
Will use PME#. Wake enable set with LAN logic.
S1–S5
(Note 1)
RI#
Set RI_EN bit in GPE0_EN register
Event sets PME_B0_STS bit; PM_B0_EN must be enabled.
Can not wake from S5 state if it was entered due to power
failure or power button override.
Intel® High
Definition Audio
S1–S5
S1–S5
(Note 1)
Primary PME#
PME_B0_EN bit in GPE0_EN register
Secondary PME#
PCI_EXP_WAKE#
SATA
S1–S5
S1–S5
S1
Set PME_EN bit in GPE0_EN register.
PCI_EXP_WAKE bit (Note 3)
Set PME_EN bit in GPE0_EN register. (Note 4)
PCI_EXP PME
Message
Must use the PCI Express* WAKE# pin rather than messages
for wake from S3,S4, or S5.
S1
SMBALERT#
S1–S5
Always enabled as Wake event
Wake/SMI# command always enabled as a Wake event.
NOTE: SMBus Slave Message can wake the system from
S1–S5, as well as from S5 due to Power Button
Override. (Note 2).
SMBus Slave Wake
Message (01h)
S1–S5
HOST_NOTIFY_WKEN bit SMBus Slave Command register.
Reported in the SMB_WAK_STS bit in the GPEO_STS
register.
SMBus Host Notify
message received
S1–S5
S1–S5
ME Non-Maskable
Wake
Always enabled as Wake event. (Note 2).
NOTES:
1.
This is a wake event from S5 only if the sleep state was entered by setting the SLP_EN and
SLP_TYP bits via software, or if there is a power failure.
2.
If in the S5 state due to a power button override or THRMTRIP#, the possible wake events
are due to Power Button, Hard Reset Without Cycling (See Command Type 3 in
Table 5-53), Hard Reset System (See Command Type 4 in Table 5-53), Wake SMBus Slave
Message (01h), and ME initiated non-maskable wake.
152
Datasheet
INTEL [ INTEL ]
