Host Bridge (D0:F0)
7.2.7.2
EXTTSCS—External Thermal Sensor Control and Status Register
Offset:
Default Value:
B7h
00000000h
Attribute:
Size:
RO, R/WLO
32 bits
Default
Bit
and
Description
Access
0000000h
RO
31:6
7
Reserved
EXTTS1 Enable (EXE1):
1 = Indicates EXTTS1 is wired and configured for external thermal sensor
input.
0
R/WLO
0
6:4
3
Reserved
R/WLO
EXTTS0 Enable (EXE0):
1 = Indicates EXTTS0 is wired and configured for external thermal sensor
input.
00b
R/WLO
00b
R/WLO
2:0
Reserved
7.2.7.3
TSIU[0,1,2,3,4]—Thermal Sensor In Use Register [0,1,2,3,4]
Offset:
TSIU0 = C0h
TSIU1 = C1h
TSIU2 = C2h
TSIU3 = C3h
TSIU4 = C4h
00000000h
Attribute:
RO, RS/WC
Default Value:
Size:
32 bits.
Default
Bit
and
Description
Access
00000000h
RO
31:1
Reserved
In Use Bit IU[0..4]: After a full Intel® SCH reset, a read to this bit
returns a 0. After the first read, subsequent reads will return a 1. A write
of a 1 to this bit will reset the next read value to 0. Writing a 0 to this bit
has no effect
0
0
RS/WC
Datasheet
87
INTEL [ INTEL ]
