Intel® HD Audio (D27:F0)
10.3.16 CORBWP—CORB Write Pointer Register
Memory Address:
Default Value:
LBAR + 48h
0000h
Attribute:
Size:
R/W, RO
16 bits
Default
Bit
and
Description
Access
00h
RO
15:8
Reserved
CORB Write Pointer: Software writes the last valid CORB entry offset into
this field in Dword granularity. The DMA engine fetches commands from
the CORB until the Read pointer matches the Write pointer. Supports
256 CORB entries (256 x 4 byte = 1 KB). This register field may be written
when the DMA engine is running.
00h
R/W
7:0
10.3.17 CORBRP—CORB Read Pointer Register
Memory Address:
Default Value:
LBAR + 4Ah
0000h
Attribute:
Size:
R/W, RO
16 bits
Default
Bit
and
Description
Access
CORB Read Pointer Reset: Software writes a 1 to this bit to reset the
CORB Read Pointer to 0 and clear any residual prefetched commands in the
CORB hardware buffer within the Intel HD Audio controller. The hardware
will physically update this bit to 1 when the CORB Pointer reset is complete.
Software must read a 1 to verify that the reset completed correctly.
Software must clear this bit back to 0 and read back the 0 to verify that the
clear completed correctly. The CORB DMA engine must be stopped prior to
resetting the Read Pointer or else DMA transfer may be corrupted.
0
R/W
15
00h
RO
14:8
7:0
Reserved
CORB Read Pointer (CORBRP): Software reads this field to determine
how many commands it can write to the CORB without over-running. The
value read indicates the CORB Read Pointer offset in Dword granularity. The
offset entry read from this field has been successfully fetched by the DMA
controller and may be over-written by software. Supports 256 CORB entries
(256 x 4 byte =1 KB). This field may be read while the DMA engine is
running.
00h
RO
154
Datasheet
INTEL [ INTEL ]
