Manageability Engine (ME) Registers (D3:F0)
9.1.14
9.1.15
9.1.16
MLAT—Maximum Latency
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/3/0/PCI
3Fh
00h
RO
Size:
8 bits
Bit
Access &
Default
Description
7:0
RO
Latency (LAT): Not implemented, hardwired to 0.
00h
HFS—Host Firmware Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/3/0/PCI
40–43h
00000000h
RO
Size:
32 bits
Bit
Access &
Default
Description
31:0
RO
Firmware Status Host Access (FS_HA): This field indicates current
00000000h
status of the firmware for the HECI controller.
PID—PCI Power Management Capability ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/3/0/PCI
50–51h
8C01h
RO
Size:
16 bits
Bit
Access &
Default
Description
15:8
RO
8Ch
Next Capability (NEXT): This field indicates the location of the next
capability item in the list. This is the Message Signaled Interrupts
capability.
7:0
RO
Cap ID (CID): This field indicates that this pointer is a PCI power
01h
management.
276
Datasheet
INTEL [ INTEL ]
