Manageability Engine (ME) Registers (D3:F0)
9.1.21
MA—Message Signaled Interrupt Message Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/3/0/PCI
90–93h
00000000h
R/W, RO
32 bits
Size:
Bit
31:2
1:0
Access &
Description
Default
R/W
00000000h
Address (ADDR): This field indicates the lower 32 bits of the system
specified message address; always DW aligned.
RO
Reserved
00b
9.1.22
MD—Message Signaled Interrupt Message Data
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/3/0/PCI
98–99h
0000h
R/W
16 bits
Size:
Bit
Access &
Default
Description
15:0
R/W
0000h
Data (Data): This 16-bit field is programmed by system software if
MSI is enabled. Its content is driven onto the FSB during the data
phase of the MSI memory write transaction.
280
Datasheet
INTEL [ INTEL ]
