Direct Memory Interface (DMI) Registers
7.1.9
DMIVC1RCTL1—DMI VC1 Resource Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/DMIBAR
20–23h
01000000h
RW, RO
32 bits
Size:
This register controls the resources associated with PCI Express Virtual Channel 1.
Bit
Access &
Default
Description
31
RW
0b
Virtual Channel 1 Enable (VC1E):
0 = Virtual Channel is disabled.
1 = Virtual Channel is enabled.
Reserved
30:27
26:24
RO
0h
RW
001b
Virtual Channel 1 ID (VC1ID): This field assigns a VC ID to the VC
resource. Assigned value must be non-zero. This field can not be
modified when the VC is already enabled.
23:20
19:17
RO
0h
Reserved
RW
000b
Port Arbitration Select (PAS): This field configures the VC resource
to provide a particular Port Arbitration service. Valid value for this field
is a number corresponding to one of the asserted bits in the Port
Arbitration Capability field of the VC resource.
16:8
7:1
RO
000h
Reserved
RW
00h
Traffic Class / Virtual Channel 1 Map (TCVC1M): This field
indicates the TCs (Traffic Classes) that are mapped to the VC resource.
Bit locations within this field correspond to TC values.
For example, when bit 7 is set in this field, TC7 is mapped to this VC
resource. When more than one bit in this field is set, it indicates that
multiple TCs are mapped to the VC resource. In order to remove one
or more TCs from the TC/VC Map of an enabled VC, software must
ensure that no new or outstanding transactions with the TC labels are
targeted at the given Link.
0
RO
0b
Traffic Class 0 / Virtual Channel 1 Map (TC0VC1M): Traffic Class
0 is always routed to VC0.
220
Datasheet
INTEL [ INTEL ]
