Direct Memory Interface (DMI) Registers
7.1.2
DMIPVCCAP1—DMI Port VC Capability Register 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/DMIBAR
04–07h
00000001h
RWO, RO
32 bits
Size:
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
Bit
Access &
Default
Description
31:7
RO
Reserved
0000000h
6:4
RO
000b
Low Priority Extended VC Count (LPEVCC): This field indicates the
number of (extended) Virtual Channels in addition to the default VC
belonging to the low-priority VC (LPVC) group that has the lowest
priority with respect to other VC resources in a strict-priority VC
Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
3
RO
0b
2:0
RWO
001b
Extended VC Count (EVCC): This field indicates the number of
(extended) Virtual Channels in addition to the default VC supported by
the device.
The Private Virtual Channel is not included in this count.
7.1.3
DMIPVCCAP2—DMI Port VC Capability Register 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/DMIBAR
08–0Bh
00000000h
RO
Size:
32 bits
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
Bit
Access &
Default
Description
31:0
RO
Reserved
00000000h
216
Datasheet
INTEL [ INTEL ]
