DRAM Controller Registers (D0:F0)
5.2.29
EPC0DRB0—ME Channel 0 DRAM Rank Boundary
Address 0
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/MCHBAR
A00–A01h
0000h
R/W, RO
16 bits
Size:
Bit
15:10
9:0
Access &
Description
Default
RO
000000b
Reserved
R/W
Channel 0 Dram Rank Boundary Address 0 (C0DRBA0):
000h
5.2.30
EPC0DRB1—ME Channel 0 DRAM Rank Boundary Address
1
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/MCHBAR
A02–A03h
0000h
RO, RW
16 bits
Size:
See C0DRB0 register.
Bit
15:10
9:0
Access &
Default
Description
RO
000000b
Reserved
RW
Channel 0 Dram Rank Boundary Address 1 (C0DRBA1):
000h
140
Datasheet
INTEL [ INTEL ]
