DRAM Controller Registers (D0:F0)
Address
Offset
Symbol
Register Name
Default
Value
Access
CD8h
TSC1
TSC2
Thermal Sensor Control 1
00h
RW/L,
RW,
RS/WC
CD9h
Thermal Sensor Control 2
Thermal Sensor Status
00h
RW/L,
RO
CDAh
TSS
00h
RO
CDC–CDFh
TSTTP
Thermal Sensor Temperature
Trip Point
00000000h
RO, RW,
RW/L
CE2h
CE4h
TCO
Thermal Calibration Offset
00h
00h
RW/L/K,
RW/L
THERM1
Hardware Throttle Control
RW/L,
RO,
RW/L/K
CEA–CEBh
TIS
Thermal Interrupt Status
0000h
RO,
RWC
CF1h
TSMICMD
PMSTS
Thermal SMI Command
00h
RO, RW
F14–F17h
Power Management Status
00000000h
RWC/S,
RO
Datasheet
115
INTEL [ INTEL ]
