E
INTEL StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
Table 17. eXtended Status Register Definitions
Reserved
WBS
bit 7
bits 6–0
High Z
When
Busy?
Status Register Bits
NOTES:
No
XSR.7 = WRITE BUFFER STATUS
1 = Write buffer available
After a Buffer-Write command, XSR.7 = 1
indicates that a Write Buffer is available.
0 = Write buffer not available
SR.6–SR.0 are reserved for future use and
should be masked when polling the status
register.
Yes
XSR.6–XSR.0
=
RESERVED FOR FUTURE
ENHANCEMENTS
33
ADVANCE INFORMATION