Electrical Specifications
Figure 11. Differential Clock Crosspoint Specification
Crosspoint Specification
650
600
550
500
450
400
350
300
250
200
550 mV
550 + 0.5 (VHavg - 710)
250 + 0.5 (VHavg - 710)
250 mV
660 670 680 690 700 710 720 730 740 750 760 770 780 790 800 810 820 830 840 850
VHavg (V)
Vhavg (mV)
Figure 12. System Bus Common Clock Valid Delay Timings
T0
T1
T2
BCLK1
BCLK0
TP
Common Clock
Signal (@ driver)
valid
valid
TQ
TR
Common Clock
Signal (@ receiver)
valid
T
T
T
= T10: T (Data Valid Output Delay)
CO
P
Q
R
= T11: T (Common Clock Setup)
SU
= T12: T (Common Clock Hold Time)
H
Mobile Intel Pentium 4 Processor-M Datasheet
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INTEL [ INTEL ]
