Electrical Specifications
.
Figure 10. Differential Clock Waveform
Tph
Overshoot
VH
BCLK1
Rising Edge
Ringback
Crossing
Voltage
Crossing
Voltage
Ringback
Margin
Threshold
Region
Falling Edge
Ringback,
BCLK0
VL
Undershoot
Tpl
Tp
Tp = T1 (BCLK[1:0] period)
T2 = BCLK[1:0] Period stability (not shown)
Tph =T3 (BCLK[1:0] pulse high time)
Tpl = T4 (BCLK[1:0] pulse low time)
T5 = BCLK[1:0] rise time through the threshold region
T6 = BCLK[1:0] fall time through the threshold region
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Mobile Intel Pentium 4 Processor-M Datasheet