Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362
Note that if the application includes surge protection, such as a varistor or sidactor on the TTIP/
TRING lines, it may be necessary to reduce the value of the capacitor CL or eliminate it
completely. Excessive capacitance at CL will distort the transmitted signals.
Figure 13. Typical Host Mode Application
VCC
22 k
Ω
1.544 MHz
MCLK
INT
CLKE
TCLK
TPOS
TNEG
TCLK
TPOS
TNEG
CS
Host
SCLK
SDO
SDI
11
+5 V
T1
Framer
MODE
TRSTE
RCLK
RPOS
RNEG
RCLK
RPOS
RNEG
17
0.47 µ
F2
T11
LXT362
TTIP
Rt1
1
C
L
(0 to 470 pF)
LOS
Rt1
NLOOP
TRING
RTIP
TVCC
VCC
100
Ω
68 µF
0.1 µF
TGND
GND
RRING
1:1
NOTES:
1. See Table 18 through Table 20 for CL, Rt, and transformer selection.
2. Optional for power savings.
Datasheet
37
INTEL [ INTEL ]
