LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
Figure 12. Typical Hardware Mode Application
1.544 MHz
TAOS
LLOOP
RLOOP
EC1
MCLK
From
TCLK
TPOS
TNEG
TCLK
TPOS
TNEG
CMOS
Control
Logic
EC2
EC3
MODE
T1
Framer
EC4
TRSTE
JASEL
0.47 µ
F2
T11
RCLK
RCLK
RPOS
RNEG
TTIP
LXT362
Rt1
RPOS
RNEG
1
C
L
P
(0 TO 470
F)
Rt1
TRING
RTIP
LOS
NLOOP
TVCC
100
Ω
VCC
68 µF
RRING
1:1
0.1 µF
TGND
GND
NOTES:
1. See Table 18 through Table 20 for CL, Rt, and transformer selection.
2. Optional for power savings.
4.3.2
Host Mode Circuit
Figure 13 shows an application using the LXT362 in Host mode. See Table 18 through Table 20 to
select the transformers (T1 and T2), resistors (Rt and RL) and capacitor (CL) needed for this
application.
36
Datasheet
INTEL [ INTEL ]
