IA186ER/IA188ER
Data Sheet
16-Bit/8-Bit Microcontrollers with RAM
February 25, 2013
Bits [9] — EN (Internal RAM Enable) → Internal memory is enabled by writing this bit
to a 1 and initializing the base address. This bit is a zero at reset.
5.1.16 MPCS (0a8h)
MCS and PCS (MPCS) Auxiliary Register. Because this register controls more than one type of
chip select, it is unlike other chip select control registers. The MPCS register contains
information for mcs3_n–mcs0_n, pcs6_n–pcs5_n, and pcs3_n–pcs0_n.
The MPCS register also contains a bit that configures the pcs6_n–pcs5_n pins as either chip
selects or as alternate sources for the a2 and a1 address bits. Either a2/a1 or pcs6_n–pcs5_n are
selected to the exclusion of the other. When programmed for address bits, these outputs can be
used to provide latched address bits for a2 and a1.
The pcs6_n–pcs5_n pins are high and not active on processor reset. When the pcs6_n–pcs5_n
are configured as address pins, an access to the MPCS register causes them to activate. They do
not require corresponding access to the PACS register to be activated. The value of the MPCS
register is undefined at reset (see Table 32).
Table 32. MCS and PCS Auxiliary Register
15 14 13 12 11 10
M6–M0
9
8
7
6
5
4
3
2
1
0
1
EX MS Reserved R2 R1–R0
Bit [15]—Reserved → Set to 1.
Bits [14–8]—M6–M0 mcs_n Block Size → These seven bits determine the total memory
block size for the mcs3_n–mcs0_n chip selects. The size is divided equally among them.
The relationship between M6–M0 and the size is shown below.
Select Sizes of M6–M0 by Total Block Size
Total
Individual
Block Size Select Size
M6–M0
8K
16K
32K
64K
128K
256K
512K
2K
4K
8K
16K
32K
64K
128K
0000001b
0000010b
0000100b
0001000b
0010000b
0100000b
1000000b
Bit [7]—EX Pin Selector → This bit determines whether the pcs6_n–pcs5_n pins are
configured as chip selects or as alternate outputs for a2 and a1. When set to 2,
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