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XDPS21081 参数 Datasheet PDF下载

XDPS21081图片预览
型号: XDPS21081
PDF下载: 下载PDF文件 查看货源
内容描述: [英飞凌 XDPS21081 是一款反激式控制器IC,其初级侧引入 ZVS (零电压开关),通过简化电路和经济型开关来实现更高的工作效率。与传统的谷值开关方案相比,通过驱动外部低压开关产生负电流使主高压开关 MOSFET 放电,从而进一步降低开关损耗。 为了以同步整流实现更高效率,XDPS21081 多模式数字强制准谐振 (FQR) 反激控制器 IC 通过谷值检测来确保 DCM (非连续导通模式)工作模式,从而实现更安全可靠的运行。]
分类和应用: 开关反激控制驱动控制器高压
文件页数/大小: 55 页 / 2141 K
品牌: INFINEON [ Infineon ]
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Forced Quasi Resonant ZVS flyback controller  
Functional Description  
Vmfio is lower than 0.9V or input bulk voltage is lower than 150V (assuming RHV=100K). The jitter of current will  
cause frequency jittering which improves the EMI spectrum signature.  
Both the peak current amplitude and peak current period will jitter over time as shown in Figure24. The default  
jittering magnitude is ± 15.625mV and the jittering period is 1ms.  
IPK + Ajitter_Max  
Ajitter_Max / 10 points  
Ipk  
IPK - AjitterMax  
t
100µs  
Jitter Period = 10 points * 100µs = 1000µs  
Figure 24 Jittering magnitude and period  
Table 5  
Peak current jitter parameters  
Parameter Name  
A_Jitter_max  
Physical value  
15.625mV  
1ms  
Enable jitter condition  
Disable jitter condition  
Vbulk>=175Vdc and  
Vmfio>=1.0V,  
Assuming RHV=100K  
Vbulk<150Vdc or  
Vmfio<0.9V,  
Assuming RHV=100K  
A_Jitter_period_val  
4.2.10  
Burst mode operation  
The burst mode (BM) is entered at light load to optimize efficiency and correlated total power consumption. The BM consists  
of three main phases:  
Burst mode entry (see 4.2.10.1)  
Burst operation (see 4.2.10.2)  
Burst mode exit (see 4.2.10.3)  
The burst mode control is described in the following chapters based on the block diagram in Figure 26 and the signal  
overview in 4.2.10.1.  
Data Sheet  
25  
Revision 2.0  
2020-08-20  
 
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