OPTIREG™ SBC TLE9274QXV33
Serial Peripheral Interface
Field
Bits
Type
Description
WK_EN
0
rw
WK wake source control
0B
1B
, WK wake disabled
, WK is enabled as a wake source
WK_PUPD_CTRL
Wake input level control (Address 000 1000B)
POR / Soft Reset Value: 0000 0000B; Restart Value: 0000 00xxB
7
6
5
4
3
2
1
0
reserved
reserved
reserved
reserved
reserved
reserved
WK_PUPD_1 WK_PUPD_0
r
r
r
r
r
r
r
rw
rw
Field
Bits
Type
Description
Reserved
WK_PUPD
7:2
1:0
r
Reserved, always reads as 0
rw
WK pull-up/pull-down configuration
00B , No pull-up/pull-down selected
01B , Pull-down resistor selected
10B , Pull-up resistor selected
11B , Automatic switching to pull-up or pull-down
TIMER1_CTRL
Timer1 control and selection (Address 000 1100B)
POR / Soft Reset Value: 0000 0000B;
Restart Value: 0000 0xxxB
7
6
5
4
3
2
1
0
TIMER1_PER TIMER1_PER TIMER1_PER
reserved
reserved
reserved
reserved
reserved
_2
_1
_0
r
r
r
r
r
r
rw
rw
rw
Field
Reserved
Bits
7:3
Type
Description
r
Reserved, always reads as 0
TIMER1_PE 2:0
R
rw
Timer1 period configuration
000B , 10 ms
001B , 20 ms
010B , 50 ms
011B , 100 ms
100B , 200 ms
101B , 1 s
110B , 2 s
111B , reserved
Datasheet
107
Rev.2.0
2022-05-06
INFINEON [ Infineon ]
