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BTS555 参数 Datasheet PDF下载

BTS555图片预览
型号: BTS555
PDF下载: 下载PDF文件 查看货源
内容描述: 智能海赛德大电流电源开关(过载保护电流限制,短路保护过温保护) [Smart Highside High Current Power Switch (Overload protection Current limitation Short circuit protection Overtemperature protection)]
分类和应用: 外围驱动器驱动程序和接口开关接口集成电路电源开关过载保护局域网
文件页数/大小: 15 页 / 132 K
品牌: INFINEON [ Infineon ]
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Target Data Sheet BTS555  
Pin  
Symbol  
Function  
Output to the load. The pins1 and 5 must be shorted with each other  
especially in high current applications!  
1
OUT  
O
3)  
2
3
IN  
I
Input, activates the power switch in case of short to ground  
Positive power supply voltage, the tab is electrically connected to this pin.  
In high current applications the tab should be used for the V connection  
instead of this pin4).  
V
bb  
+
bb  
Diagnostic feedback providing a sense current proportional to the load  
current; zero current on failure (see Truth Table on page 7)  
4
5
IS  
OUT  
S
Output to the load. The pins1 and 5 must be shorted with each other  
O
3)  
especially in high current applications!  
Maximum Ratings at Tj = 25 °C unless otherwise specified  
Parameter  
Symbol  
Values  
Unit  
V
Supply voltage (overvoltage protection see page 4)  
Supply voltage for full short circuit protection,  
resistive load or L < tbd µH  
Vbb  
Vbb  
42  
34  
V
Tj,start =-40 ...+150°C:  
Load current (short circuit current, see page 5)  
Load dump protection VLoadDump =UA +Vs, UA =13.5V  
RI5) =2, RL =0.1, td =200ms,  
IN, IS= open or grounded  
IL  
self-limited  
80  
A
V
6)  
VLoad dump  
Operating temperature range  
Storage temperature range  
Tj  
Tstg  
Ptot  
-40 ...+150  
-55 ...+150  
310  
°C  
W
J
Power dissipation (DC), TC 25 °C  
Inductive load switch-off energy dissipation, single pulse  
V
bb
=12V, Tj,start =150°C, TC =150°C const.,  
IL = tbd (>=20) A, ZL = tbdmH, 0, see diagrams on  
page 10  
tbd  
2.0  
EAS  
Electrostatic discharge capability (ESD)  
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD  
assn. std. S5.1-1993, C = 100 pF, R = 1.5 k  
VESD  
kV  
Current through input pin (DC)  
Current through current sense status pin (DC)  
see internal circuit diagrams on page 8  
IIN  
IIS  
+15, -250  
+15, -250  
mA  
3)  
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current  
capability and decrease the current sense accuracy  
Otherwise add up to 0.5 m(depending on used length of the pin) to the RON if the pin is used instead of  
the tab.  
RI = internal resistance of the load dump test pulse generator.  
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.  
4)  
5)  
6)  
Semiconductor Group  
Page 2  
1998-Jan-14  
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