AN985B/BX
Registers and Descriptors Description
Field
Bits
Type
Description
MDC
16
rw
MII Management Clock
1B
, MII Management Clock is a output reference clock to the external
PHY
Res
15
14
13
12
11
10:4
3
ro
rw
rw
ro
rw
ro
ro
Reserved
SRC
SWC
Res
SRS
Res
Serial EEPROM Read Control
Serial EEPROM Write Control
Reserved
Serial EEPROM Select
Reserved
SDO
Serial EEPROM Data Out
This bit serially shifts data from the EEPROM to the AN985B/BX.
SDI
2
1
0
rw
rw
rw
Serial EEPROM Data In
This bit serially shifts data from the AN985B/BX to the EEPROM.
SCLK
SCS
Serial EEPROM Clock
High/Low this bit to provide the clock signal for EEPROM.
Serial EEPROM Chip Select
1B
, selects the serial EEPROM chip
General-Purpose Timer
TMR_CSR11
General-Purpose Timer
Offset
58H
Reset Value
0000 0000H
ꢀꢁ ꢀꢂ ꢃꢄ ꢃꢅ ꢃꢆ ꢃꢇ ꢃꢈ ꢃꢉ ꢃꢀ ꢃꢃ ꢃꢁ ꢃꢂ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ ꢁꢀ ꢁꢃ ꢁꢁ ꢁꢂ ꢄ
ꢅ ꢆ ꢇ ꢈ ꢉ ꢀ ꢃ ꢁ ꢂ
&2
5HV
*79
0
UR
UZ
UZ
Field
Res
COM
Bits
31:17
16
Type
ro
rw
Description
Reserved
Continuous Operation Mode
1B , sets the general-purpose timer in continuous operating mode
GTV
15:0
rw
General-Purpose Timer Value
Sets the counter value. This is a countdown counter with the cycle time
of 204 μ s.
Wake-up Control/Status Register
WCSR_CSR13
Wake-up Control/Status Register
Offset
68H
Reset Value
0000 00??H
Data Sheet
62
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
