AN985B/BX
Registers and Descriptors Description
Subsystem ID and Vendor ID
SID_CR11
Subsystem ID and Vendor ID
Offset
2CH
Reset Value
From EEPROMH
ꢀꢁ ꢀꢂ ꢃꢄ ꢃꢅ ꢃꢆ ꢃꢇ ꢃꢈ ꢃꢉ ꢃꢀ ꢃꢃ ꢃꢁ ꢃꢂ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ ꢁꢀ ꢁꢃ ꢁꢁ ꢁꢂ ꢄ
ꢅ ꢆ ꢇ ꢈ ꢉ ꢀ ꢃ ꢁ ꢂ
6,'
69,'
UR
UR
Field
Bits
Type
Description
SID
31:16
ro
Subsystem ID
This value is loaded from EEPROM after power on or hardware reset.
SVID
15:0
ro
Subsystem Vendor ID
This value is loaded from EEPROM after power on or hardware reset.
Boot ROM Base Address
This register should be initialized before accessing the boot ROM space. (Write ffffffffH return fffe0001H)
BRBA_CR12
Boot ROM Base Address
Offset
30H
Reset Value
XXXX 0000H
ꢀꢁ ꢀꢂ ꢃꢄ ꢃꢅ ꢃꢆ ꢃꢇ ꢃꢈ ꢃꢉ ꢃꢀ ꢃꢃ ꢃꢁ ꢃꢂ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ ꢁꢀ ꢁꢃ ꢁꢁ ꢁꢂ ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢀ
ꢃ
ꢁ
ꢂ
%5
(
%5%$
5HV
UR
UZ
UZ
Field
Bits
Type
Description
BRBA
31:17
rw
Boot ROM Base Address
This value indicates the address mapping of boot ROM field. Besides, it
also defines the boot ROM size. The value of bit 17~10 is set to 0 for
AN985B/BX to support up to 256 KB of boot ROM.
Res
BRE
16:1
0
ro
rw
Reserved
Boot ROM Enable
The AN985B/BX really enables its boot ROM access only if both the
memory space access bit (bit 1 of CR1) and this bit are set to 1.
1B
, enable Boot ROM (Combines with bit 1 of CR1)
Capabilities Pointer
CP_CR13
Capabilities Pointer
Offset
34H
Reset Value
0000 00C0H
Data Sheet
41
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
