IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
72-BIT FIFO
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
SERIAL PROGRAMMING MODE
begun,aprogrammableflagoutputwillnotbevaliduntiltheappropriateoffset
IfSerialProgrammingmodehasbeenselected,asdescribedabove,then wordhasbeenwrittentotheregister(s)pertainingtothatflag.Measuringfrom
programmingofPAEandPAFvaluescanbeachievedbyusingacombination therisingWCLKedgethatachievestheabovecriteria;PAFwillbevalidafter
oftheLD,SEN,SCLKandSIinputpins.ProgrammingPAEandPAFproceeds twomorerisingWCLKedgesplustPAF,PAEwillbevalidafterthenexttworising
asfollows:whenLDandSENaresetLOW,dataontheSIinputarewritten,one RCLK edges plus tPAE plus tSKEW2.
bitforeachSCLKrisingedge,startingwiththeEmptyOffsetLSBandending
Theactofreadingtheoffsetregistersemploysadedicatedreadoffsetregister
withtheFullOffsetMSB.Atotalof28bits fortheIDT72T7285,30bits forthe pointer. ThecontentsoftheoffsetregisterscanbereadontheQ0-Qnpinswhen
IDT72T7295,32bits fortheIDT72T72105and34bits fortheIDT72T72115. LDissetLOWandRENissetLOW.Itisimportanttonotethatconsecutivereads
SeeFigure20,SerialLoadingofProgrammableFlagRegisters,forthetiming oftheoffsetregistersisnotpermitted.Thereadoperationmustbedisabledfor
diagramforthismode.
aminimumofoneRCLKcycleinbetweenoffsetregisteraccesses.Forx72,x36
Usingtheserialmethod,individualregisterscannotbeprogrammedselec- andx18outputbuswidth,2readcyclesarerequiredtoobtainthevaluesofthe
tively.PAEandPAFcanshowavalidstatusonlyafterthecompletesetofbits offsetregisters.StartingwiththeEmptyOffsetRegistersLSBandfinishingwith
(foralloffsetregisters)hasbeenentered.Theregisterscanbereprogrammed the Full Offset Registers MSB. See Figure 3, Programmable Flag Offset
aslongasthecompletesetofnewoffsetbitsisentered.WhenLDisLOWand Programming Sequence. See Figure 22, Parallel Read of Programmable
SEN is HIGH, no serial write to the registers can occur.
FlagRegisters,forthetimingdiagramforthismode.
Write operations to the FIFO are allowed before and during the serial
programmingsequence. Inthiscase,theprogrammingofalloffsetbitsdoesnot
havetooccuratonce. AselectnumberofbitscanbewrittentotheSIinputand
then,bybringingLDandSENHIGH,datacanbewrittentoFIFOmemoryvia
DnbytogglingWEN. WhenWENisbroughtHIGHwithLDandSENrestored
toaLOW,thenextoffsetbitinsequenceiswrittentotheregistersviaSI. Ifan
interruptionofserialprogrammingisdesired,itissufficienteithertosetLDLOW
anddeactivateSENortosetSENLOWanddeactivateLD. OnceLDandSEN
arebothrestoredtoaLOWlevel,serialoffsetprogrammingcontinues.
Fromthetimeserialprogramminghasbegun,neitherprogrammableflagwill
bevaliduntilthefullsetofbitsrequiredtofillalltheoffsetregistershasbeenwritten.
MeasuringfromtherisingSCLKedgethatachievestheabovecriteria;PAFwill
bevalidafterthreemorerisingWCLKedgesplustPAF,PAEwillbevalidafter
the next three rising RCLK edges plus tPAE.
Itispermissibletointerrupttheoffsetregisterreadsequencewithreadsor
writestotheFIFO. TheinterruptionisaccomplishedbydeassertingREN,LD,
orbothtogether.WhenRENandLDarerestoredtoaLOW level,readingof
theoffsetregisterscontinueswhereitleftoff.Itshouldbenoted,andcareshould
betakenfromthefactthatwhenaparallelreadoftheflagoffsetsisperformed,
the data wordthatwas presentonthe outputlines Qnwillbe overwritten.
Parallelreadingoftheoffsetregistersisalwayspermittedregardlessofwhich
timingmode (IDTStandardorFWFTmodes)has beenselected.
RETRANSMITFROMMARKOPERATION
TheRetransmitfromMarkfeatureallowsFIFOdatatobereadrepeatedly
startingatauser-selectedposition.TheFIFOisfirstputintoretransmitmodethat
will‘mark’abeginningwordandalsosetapointerthatwillpreventongoingFIFO
writeoperationsfromover-writingretransmitdata.Theretransmitdatacanbe
readrepeatedlyanynumberoftimesfromthe‘marked’position.TheFIFOcan
betakenoutofretransmitmodeatanytimetoallownormaldeviceoperation.
The‘mark’positioncanbeselectedanynumberoftimes,eachselectionover-
writingthepreviousmarklocation.RetransmitoperationisavailableinbothIDT
standardandFWFTmodes.
DuringIDTstandardmodetheFIFOisputintoretransmitmodebyaLow-
to-HightransitiononRCLKwhenthe ‘MARK’inputis HIGHandEF is HIGH.
TherisingRCLKedge‘marks’thedatapresentintheFIFOoutputregisteras
thefirstretransmitdata.TheFIFOremainsinretransmitmodeuntilarisingedge
on RCLK occurs while MARK is LOW.
Oncea‘marked’locationhas beenset(andthedeviceis stillinretransmit
mode,MARKisHIGH),aretransmitcanbeinitiatedbyarisingedgeonRCLK
whiletheretransmitinput(RT)is LOW.RENmustbeHIGH(readsdisabled)
beforebringingRTLOW.Thedeviceindicatesthestartofretransmitsetupby
settingEFLOW,alsopreventingreads.WhenEFgoesHIGH,retransmitsetup
iscompleteandreadoperationsmaybeginstartingwiththefirstdataattheMARK
location.SinceIDTstandardmodeisselected,everywordreadincludingthe
first‘marked’wordfollowingaretransmitsetuprequiresaLOWonREN(read
enabled).
ItisonlypossibletoreadtheflagoffsetvaluesviatheparalleloutputportQn.
PARALLELMODE
IfParallelProgrammingmodehasbeenselected,asdescribedabove,then
programmingofPAEandPAFvaluescanbeachievedbyusingacombination
of the LD, WCLK , WEN and Dn input pins. Programming PAE and PAF
proceedsasfollows: LDandWENmustbesetLOW.Forx72,x36orx18data
ontheinputsDnarewrittenintotheEmptyOffsetRegisteronthefirstLOW-to-
HIGHtransitionofWCLK.UponthesecondLOW-to-HIGHtransitionofWCLK,
dataarewrittenintotheFullOffsetRegister.ThethirdtransitionofWCLKwrites,
onceagain,totheEmptyOffsetRegister.SeeFigure3,ProgrammableFlag
OffsetProgrammingSequence.SeeFigure21,ParallelLoadingofProgram-
mableFlagRegisters,forthetimingdiagramforthismode.
Theactofwritingoffsetsinparallelemploysadedicatedwriteoffsetregister
pointer. The act of reading offsets employs a dedicated read offset register
pointer.Thetwopointersoperateindependently;however,areadandawrite
shouldnotbeperformedsimultaneouslytotheoffsetregisters. AMasterReset
initializesbothpointerstotheEmptyOffset(LSB)register.APartialResethas
noeffectonthepositionofthesepointers.
Write operations to the FIFO are allowed before and during the parallel
programmingsequence.Inthiscase,theprogrammingofalloffsetregistersdoes
nothavetooccuratonetime. One,twoormoreoffsetregisterscanbewritten
andthenbybringingLDHIGH,writeoperationscanberedirectedtotheFIFO
memory.WhenLDissetLOWagain,andWENisLOW,thenextoffsetregister
insequenceiswrittento.AsanalternativetoholdingWENLOWandtoggling
LD, parallel programming can also be interrupted by setting LD LOW and
togglingWEN.
Note,writeoperationsmaycontinueasnormalduringallretransmitfunctions,
howeverwriteoperationstothe‘marked’locationwillbeprevented.SeeFigure
18, Retransmit from Mark (IDT standard mode), for the relevant timing
diagram.
DuringFWFTmodetheFIFOisputintoretransmitmodebyarisingRCLK
edgewhenthe‘MARK’inputisHIGHandORisLOW.TherisingRCLKedge
‘marks’thedatapresentintheFIFOoutputregisterasthefirstretransmitdata.
The FIFOremains inretransmitmode untila risingRCLKedge occurs while
MARKisLOW.
Notethatthestatusofaprogrammableflag(PAEorPAF)outputisinvalid
during the programming process. From the time parallel programming has
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