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ICS1531 参数 Datasheet PDF下载

ICS1531图片预览
型号: ICS1531
PDF下载: 下载PDF文件 查看货源
内容描述: 888位MSPS A / D转换器与行同步时钟发生器 [Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator]
分类和应用: 转换器时钟发生器
文件页数/大小: 76 页 / 525 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1531 Data Sheet - Preliminary  
Chapter 6 Register Set  
6.5.35 Register 33h: B_COARSE  
The B_COARSE Register is the first adjustment for the blue channel of the ADC. It is used to coarsely  
adjust the analog signal used by the ADC. (See also Section 6.5.38, “Register 36h: B_FINE”.)  
Table 6-34. B_COARSE Register  
Bit  
Bit Name  
Bit Definition  
Ac- Spec.  
cess Func.  
Re-  
set  
ResSeerveeSde.ction 6.1, “Reserved Bits”.  
These bits can be programmed to ‘0’.  
ResSeerveeSde.ction 6.1, “Reserved Bits”.  
This bit must be programmed to ‘1’.  
33:7- Reserved  
33:6  
0
1
0
0
33:5 Reserved  
ResSeerveeSde.ction 6.1, “Reserved Bits”.  
33:4- Reserved  
33:2  
These bits can be programmed to ‘0’.  
33:1- B_Coarse_ADJ Blue Coarse (Gain) Adjust [1-0].  
R/W  
33:0 [1-0]  
These bits adjust the blue channel of the ADC by adjusting the  
gain of the video amplifier for the analog signal used by the  
ADC0.= The gain is 1.0 (default).  
1 = The gain is 1.2.  
2 = The gain is 1.4 (typical).  
3 = The gain is 1.6.  
ICS1531 Rev N 12/1/99  
December, 1999  
Copyright © 1999, Integrated Circuit Systems, Inc.  
All rights reserved.  
49  
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