IBM3009K2672
IBM SONET/SDH Framer
OC-48 Expansion Port Timing (Sheet 1of 2)
tCYC
TX_BYCLKINT
tPWH
(Input)
TX_BYCLKINE(1)
TX_BYCLKINE(0)
(Inputs)
tD(max)
tD(min)
TXFRMOUT
(Output)
tH1
TXFRMIN
(Input)
tSU1
C at output: 15 pF - 30 pF
L
Symbol
Parameter
Min
Typ
Max
55
Unit
ns
%
tCYC
tPWH / tCYC
tSU1
TX_BYCLKINT/TX_BYCLKINE clock period
12.86
TX_BYCLKINT/TX_BYCLKINE clock duty cycle
TXFRMIN set-up time to TX_BYCLKINT/TX_BYCLKINE↑
TXFRMIN hold time from TX_BYCLKINT/TX_BYCLKINE↑
TXFRMOUT output delay after TX_BYCLKINT/TX_BYCLKINE↑
TXFRMOUT rise/fall times
45
0.7
1.0
2.7
1.5
5.0
ns
ns
ns
ns
pF
tH1
tD
11.1
6.2
tr, tf
CIN
TXFRMIN pin capacitance
7.5
ssframer.01
8/27/99
Timing Characteristics
Page 65 of 279
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