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HT48R06A-1 参数 Datasheet PDF下载

HT48R06A-1图片预览
型号: HT48R06A-1
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微控制器 [8-Bit OTP Microcontroller]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 44 页 / 315 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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Preliminary
All of the data memory areas can handle arith-
metic, logic, increment, decrement and rotate
operations directly. Except for some dedicated
bits, each bit in the data memory can be set and
reset by "SET [m].i" and "CLR [m].i". They are
also indirectly accessible through memory
pointer register (MP;01H).
Indirect addressing register
Location 00H is an indirect addressing register
that is not physically implemented. Any
read/write operation of [00H] accesses data mem-
ory pointed to by MP (01H). Reading location 00H
itself indirectly will return the result 00H. Writ-
ing indirectly results in no operation.
The memory pointer register MP (01H) is a 7-bit
register. The bit 7 of MP is undefined and reading
will return the result 1 . Any writing operation
to MP will only transfer the lower 7-bit data to
MP.
Accumulator
The accumulator is closely related to ALU oper-
ations. It is also mapped to location 05H of the
data memory and can carry out immediate data
operations. The data movement between two
data memory locations must pass through the
accumulator.
Arithmetic and logic unit
-
ALU
This circuit performs 8-bit arithmetic and logic
operations. The ALU provides the following func-
tions:
Arithmetic operations (ADD, ADC, SUB, SBC,
DAA)
·
Logic operations (AND, OR, XOR, CPL) Rota-
0 0 H
0 1 H
0 2 H
0 3 H
0 4 H
0 5 H
0 6 H
0 7 H
0 8 H
0 9 H
0 A H
0 B H
0 C H
0 D H
0 E H
0 F H
1 0 H
1 1 H
1 2 H
1 3 H
1 4 H
1 5 H
1 6 H
1 7 H
1 8 H
1 9 H
1 A H
1 B H
1 C H
1 D H
1 E H
1 F H
2 0 H
3 F H
4 0 H
G e n e ra l P u rp o s e
D A T A M E M O R Y
(6 4 B y te s )
7 F H
P A
P A C
P B
P B C
P C
P C C
T M R
T M R C
A C C
P C L
T B L P
T B L H
W D T S
S T A T U S
IN T C
In d ir e c t A d d r e s s in g R e g is te r
M P
HT48R06A-1
S p e c ia l P u r p o s e
D A T A M E M O R Y
: U n u s e d
R e a d a s "0 0 "
tion (RL, RR, RLC, RRC)
·
Increment and Decrement (INC, DEC)
·
Branch decision (SZ, SNZ, SIZ, SDZ ....)
RAM mapping
watchdog time-out flag (TO). It also records the
status information and controls the operation
sequence.
With the exception of the TO and PD flags,
bits in the status register can be altered by
instructions like most other registers. Any
data written into the status register will not
change the TO or PD flag. In addition opera-
The ALU not only saves the results of a data op-
eration but also changes the status register.
Status register
-
STATUS
This 8-bit register (0AH) contains the zero flag
(Z), carry flag (C), auxiliary carry flag (AC),
overflow flag (OV), power down flag (PD), and
9
February 25, 2000