HT46R51/HT46R52
V
D
D
V
D
D
m
0 . 0 1 F *
R
E
S
S
S
T
O
P
D
1
0
0
k
S
S
T
T
i
m
e
-
o
u
t
R
E
S
C
h
i
p
R
e
s
e
t
1
0
k
Reset Timing Chart
m
0 . 1 F *
H
A
L
T
W
a
r
m
R
e
s
e
t
W
D
T
W
D
T
Reset Circuit
T
i
m
e
-
o
u
t
R
e
s
e
t
E
x
t
e
r
n
a
l
Note:
²*² Make the length of the wiring, which is con-
nected to the RES pin as short as possible, to
avoid noise interference.
R
E
S
C
o
l
d
R
e
s
e
t
S
S
T
1
0
-
b
i
t
R
i
p
p
l
e
O
S
C
1
C
o
u
n
t
e
r
P
o
w
e
r
-
o
n
D
e
t
e
c
t
i
o
n
Reset Configuration
The register states are summarized below:
WDT Time-out
(Normal Operation) (Normal Operation)
RES Reset
RES Reset
(HALT)
WDT Time-out
(HALT)*
Register Reset(Power On)
TMR
xxxx xxxx
00-0 1000
xxxx xxxx
00-0 1000
xxxx xxxx
00-0 1000
xxxx xxxx
00-0 1000
uuuu uuuu
uu-u uuuu
TMRC
Program
Counter
0000H
0000H
0000H
0000H
0000H
MP0
-xxx xxxx
-xxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
--00 xxxx
-000 0000
1111 1111
1111 1111
---1 1111
---1 1111
---- ---1
-xxx xxxx
-xxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
--1u uuuu
-000 0000
1111 1111
1111 1111
---1 1111
---1 1111
---- ---1
-xxx xxxx
-xxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
-000 0000
1111 1111
1111 1111
---1 1111
---1 1111
---- ---1
-xxx xxxx
-xxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
--01 uuuu
-000 0000
1111 1111
1111 1111
---1 1111
---1 1111
---- ---1
-uuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--11 uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
---u uuuu
---u uuuu
---- ---u
MP1
ACC
TBLP
TBLH
STATUS
INTC
PA
PAC
PB
PBC
PD
PDC
PWM
ADRL
ADRH
ADCR
ACSR
---- ---1
---- ---1
---- ---1
---- ---1
---- ---u
xxxx xxxx
xxxx ----
xxxx xxxx
xxxx ----
xxxx xxxx
xxxx ----
xxxx xxxx
xxxx ----
uuuu uuuu
uuuu ----
xxxx xxxx
0100 0000
---- --00
xxxx xxxx
0100 0000
---- --00
xxxx xxxx
0100 0000
---- --00
xxxx xxxx
0100 0000
---- --00
uuuu uuuu
uuuu uuuu
---- --uu
Note:
²*² stands for ²warm reset²
²u² stands for ²unchanged²
²x² stands for ²unknown²
Rev. 1.40
12
July 12, 2005