GL9701 PCI ExpressTM to PCI Bridge
Non-Fatal Error Reporting Enable – This bit controls reporting
1
2
3
RW
RW
RW
0b
0b
0b
of Non-fatal errors.
Fatal Error Reporting Enable – This bit controls reporting of
Fatal errors.
Unsupported Request Reporting Enable – This bit enables
reporting of Unsupported Requests when set.
Enable Relaxed Ordering – If this bit is set, the device is
permitted to set the Relaxed Ordering bit in the Attributes field of
transactions it initiates that do not require strong write ordering.
Max_Payload_Size – This field sets maximum TLP payload
size for the device. Permissible values that can be programmed are
indicated by the Max_Payload_Size
4
RW
RW
0b
7:5
000b
Supported in the Device Capabilities register.
Extended Tag Field Enable – Not supported.
Phantom Functions Enable – Not supported.
Auxiliary (AUX) Power PM Enable – Not su[pported.
8
9
RO
RO
RO
0b
0b
0b
10
Enable No Snoop – GL9701 never sets the No Snoop attribute in
transactions it initiates.
11
RO
0b
Max_Read_Request_Size – This field sets the maximum Read
14:12
15
RW
010b Request size for the Device as a Requester. The Device must not
generate read requests with size exceeding the set value.
RsvdP
RsvdP
0b
6.31 Offset 7ah: PCI Express Device Status Register
Bits
Type
Default
Description
Correctable Error Detected – This bit indicates status of
correctable errors detected. Errors are logged in this register
regardless of whether error reporting is enabled or not in the
Device Control register.
0
RW1C
0b
Non-Fatal Error Detected – This bit indicates status of Nonfatal
errors detected. Errors are logged in this register
1
RW1C
0b
regardless of whether error reporting is enabled or not in the
©2000-2006 Genesys Logic Inc. - All rights reserved.
Page 50
GENESYS [ GENESYS LOGIC ]
