GL9701 PCI ExpressTM to PCI Bridge
function to generate PME#.
Reserved
5:4
8:6
RO
RO
00b
Aux_Current – This 3 bit field reports the 3.3Vaux auxiliary
111b
current requirements for the PCI function.
D1_Support – GL9701 supports the D1 Power Management State.
D2_Support – GL9701 supports the D1 Power Management State.
PME_Support – PME# can be asserted from D0.
9
RO
RO
RO
1b
1b
10
15:11
00001b
6.38 Offset 98h: Power Management Control and Status Register
Bits
Type
Default
Description
PowerState – This 2-bit field is used both to determine
the current power state of a function and to set the
function into a new power state.
1:0
RW
00b
Reserved
7:2
8
RO
000000b
0b
PME_En – A “1” enables the function to assert PME#. When “0”,
PME# assertion is disabled.
RW
Data_Select – This 4-bit field is used to select which data
is to be reported through the Data register and Data_Scale field.
Data_Scale – This 2-bit read-only field indicates the
scaling factor to be used when interpreting the value of
the Data register.
12:9
RO
RO
0h
14:13
00b
PME_Status – This bit is set when the function would normally
15
RW1C
0b
assert the PME# signal independent of the state of the PME_En
bit.
6.39 Offset a0h: Slot Numbering Capabilities ID Register
Bits
Type
Default
Description
7:0
RO
04h
Slot Numbering Capabilities ID Register
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