Ethernet: Three-Speed,10/100, MII Management
shows the RGMII and RTBI AC timing and multiplexing diagrams.
t
RGT
t
RGTH
GTX_CLK
(At Transmitter)
t
SKRGT
TXD[8:5][3:0]
TXD[7:4][3:0]
TXD[3:0]
TXD[8:5]
TXD[7:4]
TXD[9]
TXERR
t
SKRGT
TX_CLK
(At PHY)
TX_CTL
TXD[4]
TXEN
RXD[8:5][3:0]
RXD[7:4][3:0]
RXD[8:5]
RXD[3:0] RXD[7:4]
t
SKRGT
RXD[4]
RXDV
RXD[9]
RXERR
t
SKRGT
RX_CTL
RX_CLK
(At PHY)
Figure 13. RGMII and RTBI AC Timing and Multiplexing Diagrams
8.3 10/100 Ethernet Controller (10/100 Mbps)—MII Electrical
Characteristics
The electrical characteristics specified here apply to the MII (media independent interface) signals except
MDIO (management data input/output) and MDC (management data clock). The MII interface can be
operated at 3.3 or 2.5 V. Whether the MII interface is operated at 3.3 or 2.5 V, the timing is compliant with
the IEEE 802.3 standard. The electrical characteristics for MDIO and MDC are specified in
8.3.1 MII DC Electrical Characteristics
All MII drivers and receivers comply with the DC parametric attributes specified in
The potential
applied to the input of a MII receiver may exceed the potential of the receiver’s power supply (that is, a
MII driver powered from a 3.6-V supply driving V
OH
into a MII receiver powered from a 2.5-V supply).
Tolerance for dissimilar MII driver and receiver supply potentials is implicit in these specifications.
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
31
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
