Freescale Semiconductor, Inc.
OPT2 — System Configuration Options 2
$1038
Bit 7
GWOM
0
6
CWOM
0
5
CLK4X
0
4
—
0
3
—
0
2
—
0
1
—
0
Bit 0
—
RESET:
0
GWOM — Port G Wired-OR Mode
Refer to SECTION 6 PARALLEL INPUT/OUTPUT.
0 = Port G operates normally.
1 = Port G outputs are open-drain type.
CWOM — Port C Wired-OR Mode
Refer to SECTION 6 PARALLEL INPUT/OUTPUT.
0 = Port C operates normally.
1 = Port C outputs are open-drain type.
CLK4X — 4XOUT Clock Enable
The 4XOUT signal, when enabled, is a buffered XTAL signal and is four times the fre-
quency of the E-clock. This buffered clock is intended to synchronize external devices
with the MCU. Refer to SECTION 2 PIN DESCRIPTIONS.
0 = The 4XOUT pin is driven low.
1 = The 4XOUT signal is driven on the 4XOUT pin.
Bits [4:0] — Not implemented
Always read zero
4.3.2.5 Block Protect Register (BPROT)
BPROT prevents accidental writes to EEPROM and the CONFIG register. The bits in
this register can be written to zero during the first 64 E-clock cycles after reset in the
normal modes. Once the bits are cleared to zero, the EEPROM array and the CONFIG
register can be programmed or erased. Setting the bits in the BPROT register to logic
one protects the EEPROM and CONFIG register until the next reset. Refer to Table
4-6.
BPROT — Block Protect
$1035
Bit 7
—
6
—
0
5
—
0
4
PTCON
1
3
BPRT3
1
2
BPRT2
1
1
BPRT1
1
Bit 0
BPRT0
1
RESET:
0
Bits [7:5] — Not implemented
Always read zero
PTCON — Protect for CONFIG
0 = CONFIG register can be programmed or erased normally
1 = CONFIG register cannot be programmed or erased
BPRT[3:0] — Block Protect Bits for EEPROM
0 = Protection disabled for associated block
1 = Protection enabled for associated block
OPERATING MODES AND ON-CHIP MEMORY
TECHNICAL DATA
4-13
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