Freescale Semiconductor, Inc.
Table 4-4 EEPROM Mapping
EE[3:0]
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
EEPROM Position
$0E00 – $0FFF
$1E00 – $1FFF
$2E00 – $2FFF
$3E00 – $3FFF
$4E00 – $4FFF
$5E00 – $5FFF
$6E00 – $6FFF
$7E00 – $7FFF
$8E00 – $8FFF
$9E00 – $9FFF
$AE00 – $AFFF
$BE00 – $BFFF
$CE00 – $CFFF
$DE00 – $DFFF
$EE00 – $EFFF
$FE00 – $FFFF
Bit 3 — Not implemented
Always reads one
NOCOP — COP System Disable
0 = COP system enabled (forces reset on time-out)
1 = COP system disabled
Bit 1 — Not implemented
Always reads one
EEON — EEPROM Enable
In single-chip modes EEON is forced to one (EEPROM enabled).
0 = 512 bytes of EEPROM is disabled from the memory map
1 = 512 bytes of EEPROM is present in the memory map
4.3.2.2 INIT Register
The internal registers used to control the operation of the MCU can be relocated on 4-
Kbyte boundaries within the memory space with the use of INIT. This 8-bit special-pur-
pose register can change the default locations of the RAM and control registers within
the MCU memory map. It can be written only once within the first 64 E-clock cycles
after a reset. It then becomes a read-only register.
INIT — RAM and I/O Mapping Register
$103D
Bit 7
RAM3
0
6
RAM2
0
5
RAM1
0
4
RAM0
0
3
REG3
0
2
REG2
0
1
REG1
0
Bit 0
REG0
1
RESET:
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11F1
4-10
TECHNICAL DATA
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