Port Integration Module (S12PPIMV1)
2.3.23 Port T Routing Register (PTTRR)
Address 0x0247
Access: User read(1)
7
6
5
4
3
2
1
0
R
0
0
0
0
0
PTTRR5
PTTRR4
PTTRR0
W
Routing
Option
—
0
—
0
PWM5
0
PWM4
0
—
0
—
0
—
0
PWM0
0
Reset
= Unimplemented or Reserved
Figure 2-21. Port T Routing Register (PTTRR)
1. Read: Anytime
Write: Anytime
This register configures the re-routing of PWM channels on alternative pins on Port T.
Table 2-20. Port T Routing Register Field Descriptions
Field
Description
5
Port T data direction—
PTTRR This register controls the routing of PWM channel 5.
1 PWM5 routed to PT5
0 PWM5 routed to PP5
4
Port T data direction—
PTTRR This register controls the routing of PWM channel 4.
1 PWM4 routed to PT4
0 PWM4 routed to PP4
0
Port T data direction—
PTTRR This register controls the routing of PWM channel 0.
1 PWM0 routed to PT0
0 PWM0 routed to PP0
S12P-Family Reference Manual, Rev. 1.13
76
Freescale Semiconductor