Port Integration Module (S12PPIMV1)
Table 2-14. PTT Register Field Descriptions
Description
Field
7-6, 3-1 Port T general purpose input/output data—Data Register, TIM output
PTT
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the general purpose I/O function if the related channel is enabled.
5
PTT
Port T general purpose input/output data—Data Register, TIM output, routed PWM output, API_EXTCLK output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the routed PWM, API_EXTCLK function and the general purpose
I/O function if the related channel is enabled.
• The routed PWM function takes precedence over API_EXTCLK and the general purpose I/O function if the related
channel is enabled.
• The API_EXTCLK takes precedence over the general purpose I/O function if enabled.
4,0
PTT
Port T general purpose input/output data—Data Register, TIM output, routed PWM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the routed PWM and the general purpose I/O function if the
related channel is enabled.
• The routed PWM function takes precedence over the general purpose I/O function if the related channel is
enabled.
2.3.17 Port T Input Register (PTIT)
Address 0x0241
Access: User read(1)
7
6
5
4
3
2
1
0
R
W
PTIT7
PTIT6
PTIT5
PTIT4
PTIT3
PTIT2
PTIT1
PTIT0
Reset
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-15. Port T Input Register (PTIT)
1. Read: Anytime
Write:Never, writes to this register have no effect.
S12P-Family Reference Manual, Rev. 1.13
72
Freescale Semiconductor
FREESCALE [ Freescale ]
