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MC9S12P64CFT 参数 Datasheet PDF下载

MC9S12P64CFT图片预览
型号: MC9S12P64CFT
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 566 页 / 7414 K
品牌: FREESCALE [ Freescale ]
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Port Integration Module (S12PPIMV1)  
PTI  
0
1
PIN  
0
1
PT  
0
1
DDR  
data out  
Module  
output enable  
module enable  
Figure 2-64. Illustration of I/O pin functionality  
2.4.2.4  
Reduced drive register (RDRx)  
If the pin is used as an output this register allows the configuration of the drive strength independent of the  
use with a peripheral module.  
2.4.2.5  
Pull device enable register (PERx)  
This register turns on a pull-up or pull-down device on the related pins determined by the associated  
polarity select register (2.4.2.6/2-102).  
The pull device becomes active only if the pin is used as an input or as a wired-or output. Some peripheral  
module only allow certain configurations of pull devices to become active. Refer to the respective bit  
descriptions.  
2.4.2.6  
Polarity select register (PPSx)  
This register selects either a pull-up or pull-down device if enabled.  
It becomes only active if the pin is used as an input. A pull-up device can be activated if the pin is used as  
a wired-or output.  
2.4.2.7  
Wired-or mode register (WOMx)  
If the pin is used as an output this register turns off the active high drive. This allows wired-or type  
connections of outputs.  
S12P-Family Reference Manual, Rev. 1.13  
102  
Freescale Semiconductor  
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