Port Integration Module (S12PPIMV1)
2.3.62 Port AD Reduced Drive Register (RDR1AD)
Address 0x0275
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
RDR1AD7
RDR1AD6
RDR1AD5
RDR1AD4
RDR1AD3
RDR1AD2
RDR1AD1
RDR1AD0
Reset
0
0
0
0
0
0
0
0
Figure 2-60. Port AD Reduced Drive Register (RDR1AD)
1. Read: Anytime
Write: Anytime
Table 2-56. RDR1AD Register Field Descriptions
Description
Field
7-0
Port AD reduced drive—Select reduced drive for output pin
RDR1AD This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
2.3.63 Port AD Pull Up Enable Register (PER0AD)
Address 0x0276
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
0
0
0
PER0AD1
PER0AD0
Reset
0
0
0
0
0
0
0
0
Figure 2-61. Port AD Pull Up Enable Register (PER0AD)
1. Read: Anytime
Write: Anytime
Table 2-57. PER0AD Register Field Descriptions
Description
Field
1-0
Port AD pull-up enable—Enable pull-up device on input pin
PER0AD This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect.
1 Pull device enabled
0 Pull device disabled
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
99
FREESCALE [ Freescale ]
