Port Integration Module (S12PPIMV1)
2.3.64 Port AD Pull Up Enable Register (PER1AD)
Address 0x0277
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
PER1AD7
PER1AD6
PER1AD5
PER1AD4
PER1AD3
PER1AD2
PER1AD1
PER1AD0
Reset
0
0
0
0
0
0
0
0
Figure 2-62. Port AD Pull Up Enable Register (PER1AD)
1. Read: Anytime
Write: Anytime
Table 2-58. PER1AD Register Field Descriptions
Description
Field
7-0
Port AD pull-up enable—Enable pull-up device on input pin
PER1AD This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect.
1 Pull device enabled
0 Pull device disabled
2.3.65 PIM Reserved Registers
Address 0x0278-0x27F
Access: User read(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-63. PIM Reserved Registers
1. Read: Always reads 0x00
Write: Unimplemented
2.4
Functional Description
2.4.1
General
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output or input of a peripheral module.
2.4.2
Registers
A set of configuration registers is common to all ports with exception of the ATD port (Table 2-59). All
registers can be written at any time, however a specific configuration might not become active.
S12P-Family Reference Manual, Rev. 1.13
100
Freescale Semiconductor
FREESCALE [ Freescale ]
