System Integration Module (SIM)
Exception Control
Interrupts are latched, and arbitration is performed in the SIM at the start of
interrupt processing. The arbitration result is a constant that the CPU uses to
determine which vector to fetch. Once an interrupt is latched by the SIM, no other
interrupt can take precedence, regardless of priority, until the latched interrupt is
serviced (or the I bit is cleared). See Figure 14-8.
FROM RESET
YES
BREAK OR SWI
I BIT SET?
INTERRUPT?
NO
YES
I BIT SET?
NO
YES
INTERRUPT?
NO
STACK CPU REGISTERS
SET I BIT
LOAD PC WITH INTERRUPT VECTOR
AS MANY INTERRUPTS AS EXIST ON CHIP
FETCH NEXT
INSTRUCTION
SWI
INSTRUCTION?
YES
YES
NO
RTI
INSTRUCTION?
UNSTACK CPU REGISTERS
EXECUTE INSTRUCTION
NO
Figure 14-8. Interrupt Processing
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
MOTOROLA System Integration Module (SIM)
Data Sheet
203
FREESCALE [ Freescale ]
