Pulse-Width Modulator for Motor Control (PWMMC)
Address:
$0026
Bit 7
0
6
0
5
0
4
0
3
2
1
Bit 0
Bit 8
Read:
Write:
Reset:
Bit 11
Bit 10
Bit 9
0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-33. PWM Counter Register High (PCNTH)
Address:
$0027
Bit 7
Bit 7
6
5
4
3
2
1
Bit 0
Bit 0
Read:
Write:
Reset:
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-34. PWM Counter Register Low (PCNTL)
12.9.2 PWM Counter Modulo Registers
The PWM counter modulus registers (PMODH and PMODL) hold a 12-bit unsigned
number that determines the maximum count for the up/down or up-only counter. In
center-aligned mode, the PWM period will be twice the modulus (assuming no
prescaler). In edge-aligned mode, the PWM period will equal the modulus. See
Figure 12-35 and Figure 12-36.
Address:
$0028
Bit 7
0
6
0
5
0
4
0
3
Bit 11
X
2
Bit 10
X
1
Bit 9
X
Bit 0
Bit 8
X
Read:
Write:
Reset:
0
0
0
0
= Unimplemented
X = Indeterminate
Figure 12-35. PWM Counter Modulo Register High (PMODH)
Address:
$0029
Bit 7
Bit 7
X
6
Bit 6
X
5
Bit 5
X
4
Bit 4
X
3
Bit 3
X
2
Bit 2
X
1
Bit 1
X
Bit 0
Bit 0
X
Read:
Write:
Reset:
X = Indeterminate
Figure 12-36. PWM Counter Modulo Register Low (PMODL)
Data Sheet
156
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Pulse-Width Modulator for Motor Control (PWMMC) MOTOROLA