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MC908MR32CFUE 参数 Datasheet PDF下载

MC908MR32CFUE图片预览
型号: MC908MR32CFUE
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内容描述: [MC908MR32CFUE ]
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文件页数/大小: 308 页 / 4411 K
品牌: FREESCALE [ Freescale ]
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Data Sheet — MC68HC908MR32 • MC68HC908MR16  
Section 10. Input/Output (I/O) Ports (PORTS)  
10.1 Introduction  
Thirty-seven bidirectional input-output (I/O) pins and seven input pins form six  
parallel ports. All I/O pins are programmable as inputs or outputs.  
When using the 56-pin package version:  
Set the data direction register bits in DDRC such that bit 1 is written to a  
logic 1 (along with any other output bits on port C).  
Set the data direction register bits in DDRE such that bits 0, 1, and 2 are  
written to a logic 1 (along with any other output bits on port E).  
Set the data direction register bits in DDRF such that bits 0, 1, 2, and 3 are  
written to a logic 1 (along with any other output bits on port F).  
NOTE:  
Connect any unused I/O pins to an appropriate logic level, either VDD or VSS  
Although PWM6–PWM1 do not require termination for proper operation,  
.
termination reduces excess current consumption and the possibility of electrostatic  
damage.  
Addr.  
Register Name  
Bit 7  
6
5
4
3
2
1
Bit 0  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Read:  
Write:  
Reset:  
Port A Data Register  
(PTA)  
See page 113.  
PTA7  
PTA6  
PTA5  
PTA4  
PTA3  
PTA2  
PTA1  
PTA0  
$0000  
Unaffected by reset  
PTB4 PTB3  
Unaffected by reset  
PTC4 PTC3  
Unaffected by reset  
Port B Data Register  
(PTB)  
See page 115.  
PTB7  
PTB6  
PTC6  
PTB5  
PTC5  
PTB2  
PTC2  
PTB1  
PTC1  
PTB0  
PTC0  
$0001  
$0002  
$0003  
0
Port C Data Register  
(PTC)  
See page 117.  
R
0
PTD6  
R
PTD5  
R
PTD4  
R
PTD3  
R
PTD2  
R
PTD1  
R
PTD0  
R
Port D Data Register  
(PTD)  
See page 119.  
R
Unaffected by reset  
R
= Reserved  
Figure 10-1. I/O Port Register Summary  
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0  
MOTOROLA Input/Output (I/O) Ports (PORTS)  
Data Sheet  
111  
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