Electrical and Thermal Characteristics
Table 7. Power Consumption for MPC7455 (continued)
Processor (CPU) Frequency
Unit
Notes
733 MHz
867 MHz
933 MHz
1 GHz
Typical
7.6
7.6
7.6
7.6
W
1, 3
Deep Sleep Mode (PLL Disabled)
7.3 7.3 7.3
Typical
7.3
W
1, 3
Notes:
1. These values apply for all valid processor bus and L3 bus ratios. The values do not include I/O supply power (OV
DD
DD
and GV ) or PLL supply power (AV ). OV and GV power is system dependent, but is typically <5% of V
DD
DD
DD
DD
power. Worst case power consumption for AV < 3 mW.
DD
2. Maximum power is measured at nominal V (see Table 4) while running an entirely cache-resident, contrived
DD
sequence of instructions which keep the execution units, with or without AltiVec, maximally busy.
3. Typical power is an average value measured at the nominal recommended V (see Table 4) and 65°C in a system
DD
while running a typical code sequence.
4. Doze mode is not a user-definable state; it is an intermediate state between full-power and either nap or sleep mode.
As a result, power consumption for this mode is not tested.
5.2 AC Electrical Characteristics
This section provides the AC electrical characteristics for the MPC7455. After fabrication, functional parts are
sorted by maximum processor core frequency as shown in Section 5.2.1, “Clock AC Specifications,” and tested for
conformance to the AC specifications for that frequency. The processor core frequency is determined by the bus
(SYSCLK) frequency and the settings of the PLL_CFG[0:4] signals. Parts are sold by maximum processor core
frequency; see Section 11, “Ordering Information.”
5.2.1 Clock AC Specifications
Table 8 provides the clock AC timing specifications as defined in Figure 3.
Table 8. Clock AC Timing Specifications
At recommended operating conditions. See Table 4.
Maximum Processor Core Frequency
Characteristic
Symbol
733 MHz
867 MHz
933 MHz
1 GHz
Min Max
500 1000
Unit
Notes
Min
500
Max
Min
500
Max
Min
500
Max
Processor frequency
VCO frequency
f
733
867
933
MHz
MHz
MHz
ns
1
1
1
core
f
1000 1466 1000 1734 1000 1866 1000 2000
VCO
SYSCLK frequency
SYSCLK cycle time
SYSCLK rise and fall time
SYSCLK duty cycle
f
t
33
7.5
—
133
30
33
7.5
—
133
30
33
7.5
—
133
30
33
7.5
—
133
30
SYSCLK
SYSCLK
t
, t
1.0
60
1.0
60
1.0
60
1.0
60
ns
2
3
KR KF
t
/
40
40
40
40
%
KHKL
measured at OV /2
t
DD
SYSCLK
MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1
Freescale Semiconductor
15