Freescale Semiconductor, Inc.
Resets and Interrupts
Resets
These bits can be read at any time. The value read is the one latched
into the register from the EEPROM cells during the last reset sequence.
A new value programmed into this register is not readable until after a
subsequent reset sequence. Unused bits always read as ones.
If SMOD = 1, CONFIG bits can be written at any time. If SMOD = 0,
CONFIG bits can only be written using the EEPROM programming
sequence, and are neither readable nor active until latched via the next
reset.
ROMAD — ROM mapping control (refer to Operating Modes and On-
Chip Memory)
1 = ROM addressed from $8000 to $FFFF.
0 = ROM addressed from $0000 to $7FFF (expanded mode only).
Bits [6,5] — Not implemented; always read one
PAREN — Pull-up assignment register enable (refer to Parallel
Input/Output)
1 = PPAR register enabled; pull-ups can be enabled using PPAR.
0 = PPAR register disabled; all pull-ups disabled.
NOSEC — EEPROM security disabled (refer to Operating Modes and
On-Chip Memory)
1 = Disable security.
0 = Enable security.
NOCOP — COP system disable
1 = COP system disabled.
0 = COP system enabled (forces reset on timeout).
ROMON — ROM enable (refer to Operating Modes and On-Chip
Memory)
1 = ROM included in the memory map.
0 = ROM excluded from the memory map.
EEON — EEPROM enable (refer to Operating Modes and On-Chip
Memory)
1 = EEPROM included in the memory map.
MC68HC11P2 — Rev 1.0
Technical Data
Resets and Interrupts
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