Freescale Semiconductor, Inc.
Technical Data — MC68HC11P2
Section 7. Serial Peripheral Interface (SPI)
7.1 Contents
7.2
7.3
7.4
7.5
7.6
7.7
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
SPI transfer formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
SPI signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
SPI system errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
SPI registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
7.2 Introduction
The serial peripheral interface (SPI), an independent serial
communications subsystem, allows the MCU to communicate
synchronously with peripheral devices, such as transistor-transistor
logic (TTL) shift registers, liquid crystal (LCD) display drivers, analog-to-
digital converter subsystems, and other microprocessors. The SPI is
also capable of inter-processor communication in a multiple master
system. The SPI system can be configured as either a master or a slave
device, with data rates as high as one half of the E clock rate when
configured as a master and as fast as the E clock rate when configured
as a slave.
The SPI shares I/O with four of port D’s pins and is enabled by SPE in
the SPCR:
MC68HC11P2 — Rev 1.0
Technical Data
Serial Peripheral Interface (SPI)
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