Freescale Semiconductor, Inc.
Motorola Interconnect Bus (MI BUS)
SCI/MI BUS3 registers
6.11 SCI/MI BUS3 registers
The MI BUS2 and MI BUS3 modules share the MI BUS delay register
(INIT2) at $0037 and the MI BUS2 clock rate register (S2BDH/L) at
$0050–51. The two modules are functionally identical to one another
and the registers for MI BUS3 are given here for reference purposes
only. All explanations of bit function can be found in the relevant section
of the MI BUS2 register descriptions.
6.11.1 S3CR1 — MI BUS3 control register 1
State
on reset
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
SCI/MI 3 control 1 (S3CR1)
$005A LOPS3WOMS3 MIE3 M3 WAKE3 ILT3 PE3 PT3 0000 0000
6.11.2 S3CR2 — MI BUS3 control register 2
State
on reset
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1
bit 0
SCI/MI 3 control 2 (S3CR2)
$005B TIE3 TCIE3 RIE3 ILIE3 TE3 RE3 RWU3 SBK3 0000 0000
6.11.3 S3SR1 — MI BUS3 status register 1
State
on reset
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
$005C TDRE3 TC3 RDRF3 IDLE3 OR3 NF3 FE3
SCI/MI 3 status 1 (S3SR1)
PF3 1100 0000
6.11.4 S3SR2 — MI BUS3 status register 2
State
on reset
RAF3 0000 0000
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
SCI/MI 3 status 2 (S3SR2)
$005D
0
0
0
0
0
0
0
MC68HC11P2 — Rev 1.0
Technical Data
Motorola Interconnect Bus (MI BUS)
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