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MC68HC11P1CFN3 参数 Datasheet PDF下载

MC68HC11P1CFN3图片预览
型号: MC68HC11P1CFN3
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 268 页 / 2323 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Motorola Interconnect Bus (MI BUS)  
SCI/MI BUS2 registers  
6.10.2 S2BDH, S2BDL — MI BUS clock rate control registers  
State  
on reset  
S2B12 S2B11 S2B10 S2B9 S2B8 0000 0000  
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0  
SCI/MI 2/3 baud high (S2BDH) $0050 B2TST B2SPL  
0
SCI/MI 2/3 baud low (S2BDL) $0051 S2B7 S2B6 S2B5 S2B4 S2B3 S2B2 S2B1 S2B0 0000 0100  
The contents of this register determine the clock rate for both MI BUS 2  
and MI BUS 3.  
S2B[12:0] — SCI baud rate/ MI BUS clock rate selects  
Use the following formula to calculate MI BUS 2/3 clock rate. Refer to  
the table of baud rate control values (Table 5-1) for example rates:  
ST4XCK  
MI BUS clock rate = ----------------------------  
16 × (2BR)  
where the baud rate control value (BR) is the contents of S2BDH/L  
(BR = 1, 2, 3,... 8191).  
BR = 0 disables the clock rate generator.  
6.10.3 S2CR1 — MI BUS2 control register 1  
State  
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0  
on reset  
SCI/MI 2 control 1 (S2CR1)  
$0052 LOPS2WOMS2 MIE2 M2 WAKE2 ILT2 PE2  
PT2 0000 0000  
WOMS2 — Wired-OR mode for MI BUS2 pins (PH4, PH5)  
1 = TXD2 and RXD2 are open drains if operating as outputs.  
0 = TXD2 and RXD2 operate normally.  
MIE2 — Motorola interface bus enable 2  
1 = MI BUS is enabled for this subsystem.  
0 = The SCI functions normally.  
When MIE2 is set, the SCI2 registers, bits and pins assume the  
functionality required for MI BUS.  
PT2 — MI BUS TX polarity  
1 = MI BUS transmit pin will send inverted data.  
0 = MI BUS transmit pin functions normally.  
MC68HC11P2 — Rev 1.0  
Technical Data  
Motorola Interconnect Bus (MI BUS)  
For More Information On This Product,  
Go to: www.freescale.com  
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