Freescale Semiconductor, Inc.
Analog-to-Digital Converter
Bit 7
RES10
0
6
SMP1
0
5
SMP0
0
4
PRS4
0
3
PRS3
0
2
PRS2
0
1
PRS1
0
Bit 0
PRS0
1
RESET:
ATD0CTL4/ATD1CTL4 — ATD Control Register 4
$0064/$01E4
The ATD control register 4 is used to select the clock source and set up
the prescaler. Writes to the ATD control registers initiate a new
conversion sequence. If a write occurs while a conversion is in progress,
the conversion is aborted and ATD activity halts until a write to
ATDxCTL5 occurs.
RES10 — 10 bit Mode
0 = 8 bit operation
1 = 10 bit operation
SMP1, SMP0 — Select Sample Time
Used to select one of four sample times after the buffered sample and
transfer has occurred.
Table 16-2. Final Sample Time Selection
SMP1 SMP0
Final Sample Time
2 A/D clock periods
4 A/D clock periods
8 A/D clock periods
16 A/D clock periods
0
0
1
1
0
1
0
1
Technical Data
MC68HC912DG128 — Rev 3.0
Analog-to-Digital Converter
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