Freescale Semiconductor, Inc.
Internal Clock Generator Module (ICG)
Finding the new values for DDIV and DSTG is easy if the new clock
period is a binary multiple or fraction of the original. In this case, DSTG
is unchanged and DDIV2 is DDIV1 + log (t /t ).
2 2 1
If the new clock period is not a binary multiple or fraction of the original,
both DSTG and DDIV may need to change according to these
equations:
log(t2 ⁄ t1)
DVFACT = int
---------------------------
log(2)
DDIV2 = DDIV1 + DVFACT
(t2 ⁄ t1)
---------------------------------------
(DDIV2 – DDIV1)
2
DSFACT =
DSTG2 = DSFACT DSTG1
If DSTG2 is greater than 255:
DDIV2 = DDIV2 + 1
DSTG2
DSTG2 = -----------------
2
The software required to do this is relatively simple, since most of the
math can be done before coding because the initial and final clock
periods are known. An example of how to code this in assembly code is
shown in Figure 8-9. This example is for illustrative purposes only and
does not represent a valid syntax for any particular assembler.
Advance Information
132
MC68HC908RFRK2
Internal Clock Generator Module (ICG)
MOTOROLA
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