欢迎访问ic37.com |
会员登录 免费注册
发布采购

68HC908RFRK2 参数 Datasheet PDF下载

68HC908RFRK2图片预览
型号: 68HC908RFRK2
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 [Advance Information]
分类和应用:
文件页数/大小: 250 页 / 2075 K
品牌: FREESCALE [ Freescale ]
 浏览型号68HC908RFRK2的Datasheet PDF文件第129页浏览型号68HC908RFRK2的Datasheet PDF文件第130页浏览型号68HC908RFRK2的Datasheet PDF文件第131页浏览型号68HC908RFRK2的Datasheet PDF文件第132页浏览型号68HC908RFRK2的Datasheet PDF文件第134页浏览型号68HC908RFRK2的Datasheet PDF文件第135页浏览型号68HC908RFRK2的Datasheet PDF文件第136页浏览型号68HC908RFRK2的Datasheet PDF文件第137页  
Freescale Semiconductor, Inc.  
Internal Clock Generator Module (ICG)  
Usage Notes  
;DDIV and DSTG modification code example  
;Changes DDIV and DSTG according to the initial and  
; desired clock period values  
;Requires ICGON to be clear (disabled)  
;User must previously calculate DVFACT and STFACT by  
; the equations listed in the specification  
;Modifies X and A registers  
start lda  
cmp  
icgcr  
#13  
;Verify ICGON clear (this will require  
; CMIE,CMF,CMON,ICGON,ICGS clear and CS,ECGON,ECGS set)  
lda  
add  
sta  
#dvfact ;Add the DDIV factor (calculated before  
icgdvr ; coding by the DDIV2 equation)  
icgdvr  
lda  
#stfact ;Load the DSTG factor (calculated before coding and  
; multiplied by 128 to make it 0-255 for maximum precision  
icgdsr ;Load current stage register contents  
;Multiply factor times current value  
ldx  
mul  
rola  
rolx  
bcc  
rorx  
inc  
;Since factor was multiplied by 128,  
; result is x6-x0:a7, so put it all in X  
;If result is >255, rolx will set carry  
; so divide result by two and  
; add one to DDIV  
store  
store stx  
lda  
icgdsr ;Store value  
icgdvr ;Test to see if DDIV too high or low  
cmp  
bhi  
lda  
#09  
exit  
#09  
;Valid range 0-9; too low is FF/FE; too high is 0A/0B  
;If DDIV is 0-9, you’re almost done  
;Otherwise, maximize period and execute error code  
sta  
jmp  
icgdvr  
error  
exit  
jmp  
enable ;Jump to code which turns on desired  
;clock, clock monitor, interrupts, etc.  
Figure 8-9. Code Example for Writing DDIV and DSTG  
8.5.8 Trimming Frequency on the Internal Clock Generator  
The unadjusted frequency of the low-frequency base clock (IBASE),  
when the comparators in the frequency comparator indicate zero error,  
will vary as much as ±25 percent due to process, temperature, and  
voltage dependencies. These dependencies are in the voltage and  
current references, the offset of the comparators, and the internal  
capacitor. The voltage and temperature dependencies have been  
designed to be a maximum of approximately ±1 percent error. The  
process dependencies account for the rest.  
MC68HC908RFRK2  
MOTOROLA  
AdvanceInformation  
Internal Clock Generator Module (ICG)  
133  
For More Information On This Product,  
Go to: www.freescale.com  
 复制成功!