Freescale Semiconductor, Inc.
Internal Clock Generator Module (ICG)
8.5.5 Switching Internal Clock Frequencies
The frequency of the internal clock (ICLK) may need to be changed for
some applications. For example, if the reset condition does not provide
the correct frequency, or if the clock is slowed down for a low-power
mode (or sped up after a low-power mode), the frequency must be
changed by programming the internal clock multiplier factor (N). The
frequency of ICLK is N times the frequency of IBASE, which is 307.2 kHz
±25 percent.
Before switching frequencies by changing the N value, the clock monitor
must be disabled. This is because when N is changed, the frequency of
the low-frequency base clock (IBASE) will change proportionally until the
digital loop filter has corrected the error. Since the clock monitor uses
IBASE, it could erroneously detect an inactive clock. The clock monitor
cannot be re-enabled until the internal clock is stable again (ICGS is set).
NOTE: There is no hardware mechanism to prevent changing bus frequency
dynamically. Be careful when changing bus frequency and consider the
impact on the system.
This flow is an example of how to change the clock frequency:
1. Verify there is no clock monitor interrupt by reading the CMF bit.
2. Turn off the clock monitor.
3. If desired, switch to the external clock (see 8.5.1 Switching Clock
Sources).
4. Change the value of N.
5. Switch back to internal (see 8.5.1 Switching Clock Sources),
if desired.
6. Turn on the clock monitor (see 8.5.2 Enabling the Clock
Monitor), if desired.
Advance Information
128
MC68HC908RFRK2
MOTOROLA
Internal Clock Generator Module (ICG)
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