Freescale Semiconductor, Inc.
Internal Clock Generator Module (ICG)
Low-Power Modes
8.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
8.6.1 Wait Mode
The ICG remains active in wait mode. If enabled, the ICG interrupt to the
CPU can bring the MCU out of wait mode.
In some applications, low-power consumption is desired in wait mode
and a high-frequency clock is not needed. In these applications, reduce
power consumption by either selecting a low-frequency external clock
and turning the internal clock generator off, or reducing the bus
frequency by minimizing the ICG multiplier factor (N) before executing
the WAIT instruction.
8.6.2 Stop Mode
The ICG is disabled in stop mode. Upon execution of the STOP
instruction, all ICG activity will cease and the output clocks (CGMXCLK
and CGMOUT) will be held low. Power consumption will be minimal.
The STOP instruction does not affect the values in the ICG registers.
Normal execution will resume after the MCU exits stop mode.
8.7 Configuration Register Option
One configuration register option affects the functionality of the ICG:
EXTSLOW (slow external clock).
All configuration register options will have a default setting. Refer to
Section 9. Configuration Register (CONFIG) on how the configuration
register is used.
MC68HC908RFRK2
MOTOROLA
AdvanceInformation
Internal Clock Generator Module (ICG)
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